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Silicon Validation Lead, Google Cloud, TPU
GoogleZürich, SwitzerlandSenior10+ years
Apply Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience in bringing-up and validating SoCs.
- 10 years of experience in bringing-up high-speed serial or parallel interfaces (e.g., PCIe, UCIe, DDR, HBM, Ethernet, etc).
- 5 years of experience in people management, developing employees.
- Experience in analyzing board schematics and working with scopes, logic analyzers, protocol analyzers, etc.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 3 years of experience in leading a post-silicon validation team.
- Experience in programming/scripting in C, C++, Python, Perl, or TCL.
- Experience co-working with firmware/software teams to debug issues.
- Experience in using emulation or prototyping platforms.
- Understanding of SoC architecture and interfaces (e.g., AXI, DDR, PCIe, etc.).
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
The Platform Enablement team is responsible for the development, bring-up and qualification, deployment, sustaining the quality of our AI/ML custom silicon. We plan and integrate hardware and software stacks and operate them on emulation, simulation and post-silicon platforms. We work closely with silicon design, platform hardware, firmware and software teams to enable on-time delivery of high quality silicon products.
As a Manager, you will be responsible for growing the team through hiring, developing a psychologically safe environment for the team to succeed, enabling people development through effective career conversations, mentoring and building a strong community.
In this role, you will be working on building, managing and leading a team of engineers responsible for post-silicon validation of AI/ML SoC which uses technology, working closely with the architecture, design, verification, firmware, software and platform leads, ensure timely silicon bring-up, enablement and debug closures and driving the preparation of necessary tests and collaterals for effective silicon bring-up, validation and debug, working with various IP vendors ensuring sufficient pre-sival
and enablement is done on vendor deliverables.
and enablement is done on vendor deliverables.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Responsibilities
- Build, manage and lead the team responsible for post silicon validation of complex AI/ML SoCs.
- Lead and enable the team to power-on TPU SoC silicon and bring it up through reset, boot and bare metal content or Operating System (OS) and drive the enablement of all key subsystems and high-speed serial and parallel interfaces in TPU silicon.
- Collaborate with architecture, design and verification teams to propose, implement and enable Design for Validation (DFV ) and Design for Debug (DFD) features on silicon.
- Work with architects, designers, verification and software engineers to develop and review post silicon test plans, coverage and debug.
- Drive all the people management functions including, but not limited to, hiring, people development, prioritizing and managing resources to achieve project execution timelines.
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