Defect Equipment Engineer

• Equipment Health & Defect Control: Drives tool defect performance by analyzing Non-Product Wafer (NPW) data to eliminate "high fliers," lower baseline defectivity, and minimize tool-to-tool variation across the fleet.

• Advanced Data & FDC Correlation: Performs advanced data analysis, drawing direct correlations between NPW defect data and Fault Detection and Control (FDC) sensor data to optimize equipment specifications and prevent excursions.

• Production-to-NPW Matching: Continuously correlates production wafer defect data with NPW signatures to ensure NPW monitoring methodologies accurately reflect actual production defect health.

• Hands-On Fab Troubleshooting: Conducts hands-on investigations inside the cleanroom (FAB) to trace defect sources directly to internal tool components, gas lines, hardware, or environmental factors.

• Cross-Module Process Coverage: Oversees equipment defect performance across all major functional modules, including Photo, CVD, Etch, Metal, Diffusion, Clean, Implant, and CMP.

• Environmental Defect Reduction: Reduce cleanroom environmental defects, ensuring ambient conditions and mini-environments do not compromise tool or wafer cleanliness. Humidity, airflow, etc.

• Education: Requires a Bachelor's degree in Electrical, Chemical, Mechanical Engineering, Material Science, Chemistry, Physics, or related technical fields.

• Experience: 5+ years of semiconductor engineering experience, with a heavy focus on equipment defect monitoring, tool baseline reduction, and hardware troubleshooting highly preferred.

• OEM Background: Direct experience working at or closely with major Semiconductor Equipment Manufacturers (e.g., ASML, AMAT, Lam Research) is strongly preferred, bringing advanced knowledge of tool hardware architectures, subsystems, and vendor-specific defect signatures.

• Core Physics Competency: Strong fundamental understanding of underlying equipment physics, including vacuum systems, plasma generation, RF physics, airflow dynamics, turbulence, and heat transfer, to accurately model and root-cause hardware-driven defectivity.

• Tool & Metrology Expertise: Strong proficiency in advanced non-patterned and patterned wafer inspection/review tools (e.g., KLA Surfscan, eDR, or equivalent inline metrology systems) is highly preferred

• Data & Hardware Competency: Working knowledge of Statistical Process Control (SPC) and Design of Experiments (DOE) methodologies for tool matching, FDC optimization, and specification setting.

The current base salary range for this role is between $76,000 - $145,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.