Job Details:

Job Description: 

• Responsible for managing the Engineering Compute (Linux based VNC, interative & batch servers), Storage & EDA licenses for the Intel’s Hard IP Division (HIPD).
• This includes working with the IP teams in the org to forecast the compute & storage needs on yearly, quarterly & monthly basis.
• Collaborate with Intel IT team for allocating the required compute & storage for all the users in HIPD.
• Track the utilization and adjust the forecast & allocations accordingly.
• Reduce job failures by analyzing weekly EC peak average, EC time loss, Core, Memory and CPU utilization.
• Identify opportunities for job profiling and optimize run times with Design Tools/Flows teams.
• Managing the diskspace by regular tracking of unused data & recycling disks.
• Assist the team in troubleshooting issues when necessary, this needs the person to have good knowledge of Unix/Linux systems and basic networking knowledge.
• Enable ODC setup with the outsourcing partners of HIPD, for them to access HIPD compute design env from the ODC. This also involves forecasting capacity for the ODCs.
• Manage the unix groups for projects of HIPD, which includes creating and owning new groups, adding/removing users as necessary.
• Helping the teams in creating & managing Central runs of RTL Validations for IPs. Assisting the teams in project data archival.
• Responsible for forecasting EDA tool licenses, tracking of EDA licenses on a monthly/quarterly basis. Knowledge for FlexLM license management.
• 1st level support on licensing issues for project teams and participate in monthly LAC rep forum. Run lmstat and other tools to determine if license is running and reachable to address queries.

Qualifications:

• B.Tech/M.tech in Computer science or electronics background having hands on experience of 5-14 years.
• As part of this job the individual will be expected to create web based indicators and share the same to the users across the org.
• Knowledge of PowerBI, Splunk type of indicators system will be a plus.
• Knowledge of Github will be plus for this role.
• Knowledge of Intel’s Netbatch system will be plus for this role.
• Experience in high performance compute, storage, Netbatch/ load sharing infrastructure.
• Good analytical skills.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.