Senior Systems and Test Integration Engineer- Hardware DevOps Environment
GDMSBasic Qualifications
Requires a Bachelor’s degree in Electrical Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree plus 3 years of job-related experience.
CLEARANCE REQUIREMENTS:
Department of Defense TS/SCI security clearance is preferred at time of hire. Candidates must be able to obtain a TS/SCI clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
Responsibilities for this Position
As an Systems Test Integration-HDE/Hardware DevOps Environment Engineer, for the GDMS Spacecraft team, you'll be a key element of the integration and test team responsible for designing, deploying, and integrating the payload emulation suite in tandem with the Dev Ops and Special Test Equipment groups to support National Security. You will also work directly with other engineering disciplines and program management in a cross-functional environment. A highly qualified candidate will have direct Integration and Test experience with hi-reliability space payloads and/or vehicles.
We encourage you to apply if you have any of these preferred skills or experiences:
- Experience with Automated Testing Environments or Special Test Equipment
- Experience with failure review board processes, Failure Reporting and Corrective Action systems relevant to electronic systems for space
- Experience with SRR/PDR/CDR/TRR/PSA evolution
- 5+ years of FPGA development experience on Xilinx Ultrascale/Ultrascale+ devices
- Proficiency in VHDL and/or SystemVerilog for RTL design, from microarchitecture definition through hardware integration
- Experience designing FPGA firmware for high-speed serial interfaces including JESD204B (6+ Gbps), 10GbE, and SerDes
- Proficiency in Xilinx Vivado toolchain - synthesis, implementation, timing closure, and ILA debug
- Experience with SPI command/control interfaces, JTAG, and general-purpose digital I/O
- Familiarity with FMC mezzanine card interfaces (VITA 57)
Some of the key tasks for this position include:
- Collaborate across engineering disciplines to define unit functionality, document interface requirements, and verify behavior on hardware
- Independently lead FPGA implementation and troubleshooting efforts to meet program milestones
- Work with test equipment including power supplies, multimeters, signal generators, signal/logic analyzers, and oscilloscopes
- Manage task priorities, coordinate schedules, and communicate clear status to the team
- Work in Linux (RHEL/Ubuntu) and Windows (Win11) operating systems
- Use the Microsoft tools suite
- Integration and test of space flight hardware
- Understand new technologies and work with vendors to stay on the cutting edge
What sets you apart:
- Creative thinker with demonstrated success leading the integration and test life cycle
- Collaborative team player eager to provide technical leadership and position others for success
- Exceptional communication, presentation, and influence management skills, with notable record of securing buy-in on concepts and ideas
- Experienced in the art of negotiation with ability to meet challenging customer requirements with win-win solutions
- Demonstrated ability to interface with program management and customers
- Commitment to ongoing professional development for yourself and others
- Identifies opportunities to apply AI for continuous improvement and innovation
Our Commitment to You:
- An exciting career path with opportunities for continuous learning and development
- Research oriented work, alongside award winning teams developing practical solutions for our nation's security
- Flexible schedules with every other Friday off work, if desired (9/80 schedule)
- Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more
- See more at gdmissionsystems.com/careers/why-work-for-us/benefits
Workplace Options:This position is Onsite.While on-site, you will be a part of the Engineering Team located in Scottsdale, Arizona.
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Salary Note
This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary. This job posting will remain open until the position is filled.Combined Salary Range
USD $130,519.00 - USD $140,000.00 /Yr.Company Overview
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans