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RFIC System Engineer
AppleSan Francisco Bay Area, California, United States$184,700 - $324,80010+ years
Apply Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
The Wireless SoC Radio Team architects, designs and delivers state-of-art CMOS radios, from RF-to-bits. To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and mixed-signal blocks, such as integrated PAs and LNAs, data converters, mixers, baseband filters, phase-locked loops, crystal oscillators, wideband LDOs and bandgap references. As an RFIC system engineer, you will be at the center of this wireless SoC design group. You will have a critical impact on developing Apple’s state-of-the-art radios and getting them into hundreds of millions of products. In this highly visibility role, and as part of our team, you will have responsibilities on researching, designing and bringing the next-generation of wireless technologies into high-volume production in advanced CMOS technology nodes.
- Translate chip or transceiver-level specifications into detailed block-level specifications
- Work with the design and algorithms team to develop models for the impact of analog impairments on transceiver performance
- Work with the design engineers to ensure block performance meets system requirements through bottom up modeling
- Overseeing the test and characterization of the design, and debugging issues that may arise from early development stages through productization.
- Working with the technology team to understand the capabilities and limits of the technology node to achieve the optimum performance.
- BS and a minimum of 10 years relevant industry experience
- RF/analog and mixed signal design experience in RF CMOS design.
- Experience with MATLAB, python , SystemVue or other system level modeling
- Experience modeling RF/Analog circuits using MATLAB/Verilog-A/python and writing block-level specifications based on this modeling
- Direct tape-out experience with one or more of the following blocks: RF front-end circuits, PA, LNA, mixer, oscillator, PLL, LO, VGA, filter, ADC/DAC, TIA or other baseband analog blocks in deep sub-micron CMOS technology.
- Deep understanding of various RF transceiver architectures and their trade-offs.
- Deep understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, and other analog impairments.
- Deep understanding of CMOS device physics, RF device modeling, device noise parameters, inductor modeling, and circuit layout for optimum RF performance.
- Familiarity with Bluetooth, WiFi and Ultra-Wideband standards
- Experience in Si characterization and debug.