Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job, and there's no telling what you could accomplish. Hard-working people and inspiring, innovative technologies are the norms here.
Enter a multifunctional role as a Design Verification Engineer in our team. We are at the center of the IP and full-chip verification effort within a silicon design group responsible for verifying the state-of-the-art Cellular RF SoCs. This position requires someone comfortable with diving into HW design and verification engineering.
You will need a fundamental understanding of HW and SW design, as well as the eagerness to do hands-on verification. The cool thing is, once you crack the design verification world, it will potentiate your knowledge of HW/SW systems in the RF world. We will introduce you to assertion-based verification, simulation acceleration, and formal methods.
You will learn special verification languages as universal verification methodology (UVM) or formal description languages, like SVA, flanked by AI-based approaches.
Our team is a very strong cellular hardware design verification team with very good individual communication. You will work in a strong team setup with a lot of interpersonal interaction that will help you to get a very wide understanding of our work, as well as the sub-system and system integration into RF modems. You will build metric-driven verification plans from specifications, review them, and refine them to achieve coverage targets. You will define functional verification requirements based on design requirements and architect and develop UVM-based, highly reusable test benches starting from different components over a cluster into SoC levels.