Silicon Design Engineer - RTL Integration

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE:

The role involves integrating RTL components from different design teams into AMD's next generation FPGA and programmable SOC products; building Full-Chip RTL connectivity models; verifying Full-Chip models match architectural intent; and developing custom tools and methodologies to improve development efficiency and quality.

THE PERSON:

We are looking for a highly qualified and driven RTL digital design engineer to join our FPGA Product Development (FPD) Silicon Integration team. The candidate should have a passion for modern, complex processor architecture, digital design, and verification in general. The candidate must be a team player who has excellent communication skills and experience collaborating with team members and other engineers across globally diverse regions. The candidate must also have strong analytical and problem-solving skills; be willing to learn and ready to take on problems; and is a self-starter able to work on his/her own as well as within a team.

KEY RESPONSIBILITIES:

• Develop Full-Chip SoC RTL
• Write Full-Chip Design Specification documents
• Work with IP development teams to integrate IP components
• Work across Architecture, Software, and Verification teams to assure Full-Chip SoC RTL quality
• Run lint and other static verification tools
  
  

PREFERRED EXPERIENCE:

• Experience or familiarity using FPGAs
• Deep understanding of complex FPGA and SoC architectures
• Proven experience in ASIC design flow execution
• Proficient in RTL and behavioral coding in Verilog/SystemVerilog HDL
• Familiarity with CAD tools such as VCS, Verdi, Design Compiler, Primetime, Spyglass,
  Lint, Conformal, CDC/RDC tools, etc.
• Familiarity in timing constraints for synthesis and STA at SoC level
• Familiarity in Unix/Linux computing environment and scripting languages such as Shell
  Scripts, Perl, and/or Python
• Familiarity with Revision Control software such as Perforce

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Electrical Engineering / Computer Engineering

LOCATION:

Singapore

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.